1. Field of the Invention
The present invention relates to a nitride-based compound semiconductor electron device, and more particularly, to a semiconductor electron device, such as a field-effect transistor, including nitride-based compound semiconductors as min component thereof.
2. Description of the Related Art
In general, field-effect transistors (FETs) having nitride-based compound semiconductors, such as GaN-based compound semiconductors, are substantially free from a burn-up failure even at an operating temperature as high as close to 400° C., and thus are drawing attention as solid laser devices operating at a higher temperature range. Hereinafter, the FETs having GaN-based compound semiconductors are referred to as GaN-based FETs.
However, it is difficult to manufacture a single-crystal substrate having a large diameter in the case of a GaN-based crystal differently from the cases of Si crystal, GaAs crystal, and InP crystal. Thus, it is difficult to form a semiconductor layer structure in a GaN-based FET by epitaxially growing a crystalline layer of a GaN-based material on a GaN single-crystal substrate. Accordingly, in manufacturing a GaN-based FET, a crystalline layer of GaN-based semiconductor is grown by using the process such as described hereinafter. It is to be noted that the process will be described taking as an example a lateral GaN-based FET shown in the schematic drawing of FIG. 3.
First, on a single-crystal sapphire substrate 11 for the crystal growth, an intermediate layer 12 including a GaN single crystal as a main component thereof is deposited by using an epitaxial crystal growth process, such as a MOCVD process, while appropriately selecting the filming conditions for the crystal growth, such as selecting a growth temperature at 500 to 600° C., for example.
Thereafter, a buffer layer 13, a channel layer 14, a donor layer 15, and a contact layer 16 are consecutively deposited on the intermediate layer 12 by using a GaN epitaxial growth process. Thereafter, an electrode group is formed on the semiconductor layer structure, the electrode group including a source electrode 17a and a drain electrode 17c, which are coupled to the semiconductor layer structure with an ohmic contact, and a gate electrode 17b, which is coupled thereto with a Schottky contact or MIS (Metal-Insulator-Semiconductor) structure, to thereby achieve the lateral GaN-based FET as shown in FIG. 3.
In the conventional structure of the GaN-based FETs, as described above, the lattice constants are significantly different between the sapphire substrate 11 and the GaN single crystal, and hence, the intermediate layer 12 generally has therein dislocation defects caused by the lattice mismatch with the sapphire substrate 11 and extending perpendicular to the depthwise direction of the film. The dislocation density in the semiconductor layer structure usually has a value of about 1×109 to 1×1010 cm−2. Thus, in the GaN-based FET, the semiconductor layer structure including the channel layer 14, the donor layer 15, and the contact layer 16 is formed on the intermediate layer 12 having such defects.
More specifically, in the FET having the above-described layer structure, dislocation defects existing in the intermediate layer 12 are transmitted directly in the depthwise direction (or vertical direction) into the semiconductor active layer structure of GaN crystal having the FET function. The number of existing dislocation defects is, for example, about 100 per unit area of 1 μm2 of the semiconductor layer structure. Hence, the GaN crystal structure configuring the semiconductor active layer structure is degraded in the film quality thereof. This causes a problem of leakage current in the resultant GaN-based FETs to degrade the pinch-off characteristic.
More generally, there has been the problem, in a semiconductor electron device having nitride-based compound semiconductors, that leakage current flows due to dislocation defects in the layer structure other than the channel layer, resulting in that a satisfactory pinch-off characteristic cannot be obtained.
Accordingly, various techniques have been examined for suppressing the dislocation defects, i.e., one of the factors that cause occurrence of the leakage current. Japanese Patent Laid-Open Publication No. 2003-059948, for example, describes a method that suppresses dislocation defects by providing a buffer layer structure wherein AlN layers and GaN layers are alternately deposited one on another on a silicon substrate. However, even with this method, the leakage current cannot be reduced to a satisfactory degree, and thus a satisfactory pinch-off characteristic cannot be obtained heretofore.